Commit d4281498 authored by Tom Knot's avatar Tom Knot

Initial Commit

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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>neuron_kernel</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<triggers>full,incremental,</triggers>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.core.ccnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
</projectDescription>
buildTools.path=C\:\\cygwin64\\bin
eclipse.preferences.version=1
toolchain.path.280381241=C\:\\MinGW\\mingw32\\bin
<?xml version="1.0" encoding="UTF-8" standalone="no"?>
<project>
<configuration id="cdt.managedbuild.toolchain.gnu.cygwin.base.1212799192" name="Default">
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</extension>
</configuration>
</project>
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eclipse.preferences.version=1
environment/project/cdt.managedbuild.toolchain.gnu.cygwin.base.1212799192/PATH/delimiter=;
environment/project/cdt.managedbuild.toolchain.gnu.cygwin.base.1212799192/PATH/operation=replace
environment/project/cdt.managedbuild.toolchain.gnu.cygwin.base.1212799192/PATH/value=C\:\\cygwin64\\bin;C\:\\MinGW\\mingw32\\bin;C\:/Program Files/Java/jre1.8.0_131/bin/server;C\:/Program Files/Java/jre1.8.0_131/bin;C\:/Program Files/Java/jre1.8.0_131/lib/amd64;C\:\\ProgramData\\Oracle\\Java\\javapath;C\:\\Windows\\system32;C\:\\Windows;C\:\\Windows\\System32\\Wbem;C\:\\Windows\\System32\\WindowsPowerShell\\v1.0\\;C\:\\Program Files\\PuTTY\\;C\:\\Program Files (x86)\\Skype\\Phone\\;C\:\\Program Files (x86)\\Git\\cmd;C\:\\Program Files (x86)\\GitExtensions\\;C\:\\etc\\arm_gcc\\bin;C\:\\Python27;;C\:\\etc\\yagarto-20121222\\bin;C\:\\Users\\Tom\\AppData\\Local\\Microsoft\\WindowsApps;C\:\\Program Files (x86)\\Nmap;C\:\\eclipse
environment/project/cdt.managedbuild.toolchain.gnu.cygwin.base.1212799192/append=true
environment/project/cdt.managedbuild.toolchain.gnu.cygwin.base.1212799192/appendContributed=true
########################################################################
# Copyright (C) 2009-2011 Richard Hughes <richard@hughsie.com>
#
# Licensed under the GNU General Public License Version 2
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 2 of the License, or
# (at your option) any later version.
#
########################################################################
# SPI UART
KERNEL=="ttyNS0", SYMLINK+="extcomm/0/0"
KERNEL=="ttyNS0", SYMLINK+="extcomm/1/0", KERNELS=="spi0.1"
KERNEL=="ttyNS0", SYMLINK+="extcomm/2/0", KERNELS=="spi0.2"
KERNEL=="ttyNS0", SYMLINK+="extcomm/3/0", KERNELS=="spi0.3"
KERNEL=="ttyNS1", SYMLINK+="extcomm/0/1"
KERNEL=="ttyNS1", SYMLINK+="extcomm/1/0", KERNELS=="spi0.1"
KERNEL=="ttyNS1", SYMLINK+="extcomm/2/0", KERNELS=="spi0.2"
KERNEL=="ttyNS1", SYMLINK+="extcomm/3/0", KERNELS=="spi0.3"
KERNEL=="ttyNS2", SYMLINK+="extcomm/0/2"
KERNEL=="ttyNS2", SYMLINK+="extcomm/1/0", KERNELS=="spi0.1"
KERNEL=="ttyNS2", SYMLINK+="extcomm/2/0", KERNELS=="spi0.2"
KERNEL=="ttyNS2", SYMLINK+="extcomm/3/0", KERNELS=="spi0.3"
# SYSFS Platform Device Symlink
KERNEL=="unipi_plc", RUN+="/opt/link_sysfs.sh"
\ No newline at end of file
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CC = dtc -O dtb
.PHONY = clean
.PHONY += all
%.dtbo: %.dts
$(CC) -o $@ $<
install: clean neuron-spi-new.dtbo
$(shell mount -o remount,rw /boot) \
$(shell cp neuron-spi-new.dtbo /boot/overlays)
clean:
$(shell rm -r -f neuron-spi-new.dtbo)
CC = dtc -O dtb -@
.PHONY = clean
.PHONY += all
%.dtbo: %.dts
$(CC) -o $@ $<
install: clean neuron-spi-new.dtbo
$(shell mount -o remount,rw /boot) \
$(shell cp neuron-spi-new.dtbo /boot/overlays)
clean:
$(shell rm -r -f neuron-spi-new.dtbo)
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708",
"brcm,bcm2709";
fragment@0 {
target = <&spi0>;
frag0: __overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
cs-gpios = <&gpio 8 1>, <&gpio 7 1>, <&gpio 24 1>, <&gpio 25 1>;
neuronspi0: neuronspi@0 {
compatible = "neuronspi";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <12000000>;
pinctrl-0 = <&neuron_0_irq_pin>;
pinctrl-names = "default";
interrupt-parent = <&gpio>;
interrupts = <27 0x1>;
status = "okay";
};
neuronspi1: neuronspi@1 {
compatible = "neuronspi";
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <1200000>;
pinctrl-0 = <&neuron_1_irq_pin>;
pinctrl-names = "default";
interrupt-parent = <&gpio>;
interrupts = <23 0x1>;
status = "okay";
};
neuronspi2: neuronspi@2 {
compatible = "neuronspi";
reg = <3>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <1200000>;
pinctrl-names = "default";
pinctrl-0 = <&neuron_2_irq_pin>;
interrupt-parent = <&gpio>;
interrupts = <22 0x1>;
status = "okay";
};
};
};
fragment@1 {
target = <&spidev0>;
__overlay__ {
status = "okay";
};
};
fragment@2 {
target = <&spidev1>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&gpio>;
__overlay__ {
spi0_cs_pins {
brcm,pins = <8 7 24 25>;
brcm,function = <1>;
brcm,pull = <0>;
};
neuron_0_irq_pin: neuron_0_irq_pin {
brcm,pins = <27>;
brcm,function = <0>;
brcm,pull = <1>;
};
neuron_1_irq_pin: neuron_1_irq_pin {
brcm,pins = <23>;
brcm,function = <0>;
brcm,pull = <1>;
};
neuron_2_irq_pin: neuron_2_irq_pin {
brcm,pins = <22>;
brcm,function = <0>;
brcm,pull = <1>;
};
};
};
__overrides__ {
cs0_pin = <&frag0>,"cs-gpios:4", <&spi0_cs_pins>, "brcm,pins:0";
cs1_pin = <&frag0>,"cs-gpios:16", <&spi0_cs_pins>,"brcm,pins:4";
cs2_pin = <&frag0>,"cs-gpios:40", <&spi0_cs_pins>,"brcm,pins:12";
cs3_pin = <&frag0>,"cs-gpios:28", <&spi0_cs_pins>,"brcm,pins:8";
neuron_irq_0 = <&neuronspi0>,"interrupts:0", <&neuron_0_irq_pin>,"brcm,pins:0";
neuron_irq_1 = <&neuronspi1>,"interrupts:0", <&neuron_1_irq_pin>,"brcm,pins:0";
neuron_irq_2 = <&neuronspi2>,"interrupts:0", <&neuron_2_irq_pin>,"brcm,pins:0";
};
};
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708",
"brcm,bcm2709";
fragment@0 {
target = <&spi0>;
frag0: __overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
cs-gpios = <&gpio 8 1>, <&gpio 7 1>, <&gpio 24 1>, <&gpio 25 1>;
neuronspi0: neuronspi@0 {
compatible = "unipi,neuron";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <12000000>;
status = "okay";
};
neuronspi1: neuronspi@1 {
compatible = "unipi,neuron";
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <1200000>;
status = "okay";
};
neuronspi2: neuronspi@2 {
compatible = "unipi,neuron";
reg = <3>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <1200000>;
status = "okay";
};
};
};
fragment@1 {
target = <&spidev0>;
__overlay__ {
status = "disabled";
};
};
fragment@2 {
target = <&spidev1>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&gpio>;
__overlay__ {
spi0_cs_pins {
brcm,pins = <8 7 24 25>;
brcm,function = <1>;
};
};
};
__overrides__ {
cs0_pin = <&frag0>,"cs-gpios:4", <&spi0_cs_pins>, "brcm,pins:0";
cs1_pin = <&frag0>,"cs-gpios:16", <&spi0_cs_pins>,"brcm,pins:4";
cs2_pin = <&frag0>,"cs-gpios:40", <&spi0_cs_pins>,"brcm,pins:12";
cs3_pin = <&frag0>,"cs-gpios:28", <&spi0_cs_pins>,"brcm,pins:8";
};
};
/dts-v1/;
/plugin/;
/ {
compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708",
"brcm,bcm2709";
fragment@0 {
target = <&spi0>;
frag0: __overlay__ {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
cs-gpios = <&gpio 8 1>, <&gpio 7 1>, <&gpio 25 1>, <&gpio 24 1>;
neuronspi0: neuronspi@0 {
compatible = "unipi,neuron";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <12000000>;
status = "okay";
};
neuronspi1: neuronspi@1 {
compatible = "unipi,neuron";
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <1200000>;
status = "okay";
};
neuronspi2: neuronspi@2 {
compatible = "unipi,neuron";
reg = <3>;
#address-cells = <1>;
#size-cells = <0>;
spi-max-frequency = <1200000>;
status = "okay";
};
};
};
fragment@1 {
target = <&spidev0>;
__overlay__ {
status = "disabled";
};
};
fragment@2 {
target = <&spidev1>;
__overlay__ {
status = "disabled";
};
};
fragment@3 {
target = <&gpio>;
__overlay__ {
spi0_cs_pins {
brcm,pins = <8 7 25 24>;
brcm,function = <1>;
};
};
};
__overrides__ {
cs0_pin = <&frag0>,"cs-gpios:4", <&spi0_cs_pins>, "brcm,pins:0";
cs1_pin = <&frag0>,"cs-gpios:16", <&spi0_cs_pins>,"brcm,pins:4";
cs2_pin = <&frag0>,"cs-gpios:28", <&spi0_cs_pins>,"brcm,pins:8";
cs3_pin = <&frag0>,"cs-gpios:40", <&spi0_cs_pins>,"brcm,pins:12";
};
};
Regmap Data Format
- Defines which contain the length of the model definition, one for each model
- Each define uses the following naming format: NEURONSPI_MODEL_XYZ_HW_DEFINITION_SIZE
- Definition itself is a data structure in the following format:
u16 Number of Neuron modules
Module (Combination) Definition pointer<number of modules>
- Each board module definition is preceded by a define with the following name: NEURONSPI_BOARD_L[0-9][0-9][0-9]U[0-9][0-9][0-9]_HW_DEFINITION_SIZE, where L is the lower board id and U is the upper board id, and which specifies the definition length for the combination
- Module definitions are in the following format:
u16 Lower board ID
u16 Upper board ID
u32 Number of Blocks
Register block struct:
u32 Block starting register
u32 Block register count
[u32]<register count> Register type flags
Register type flags:
u16 Function
u8 Access Flags
u4 Frequency
- 0: Never
1: As fast as possible
2: 10 hz
3: 1 hz
4: 0.1 hz
5: once per minute
6: once per 15 minutes
7: only once
8 - 15: reserved
[5] - [7]: reserved
u8 System Flags
[0] - [7]: reserved
\ No newline at end of file
The packets are a two-phase Modbus RTU, and the header is as follows, always unsigned:
1st byte: Device index. Index of the board to use, either 1, 2 or 3. Modules available depend on module size (S – 1;M-1 and 2; L- 1,2 and 3), see the Modbus maps: https://files.unipi.technology/s/public?path=%2FProducts%2FNeuron%2FModbus%20Registers%20Maps#pdfviewer for details (note that you have to use the board-specific addressing mentioned in the document, the broadcast addressing is implemented in the TCP server software; I.e. to read the global register “1101” one would read register “1001” from board index 2)
2nd and 3rd byte: currently unused
4th byte: this value determines whether the operation is done in a single phase or split into two; use 1 unless flashing
5th and 6th bytes: frequency setting in a 16-bit value; use either 0 or 8000 for best results
7th byte: response delay; 25 will work packets shorter than 60 bytes (sans the header), otherwise use 25 + ((header_length - 60)/2)
8th byte: device locking; this is used in flashing and will cause the device to switch to exclusive mode fort the current client. Use 0 for normal operation
9th and 10th byte: currently unused
As for the packet, it consists of two parts/phases; first part is always 6 bytes long and has the following format:
1st byte: Modbus Operation Code, I.e. 0x04 for a read (look up simplymodbus for a detailed description of Modbus commands)
2nd and 3rd bytes: First target register/coil in a 16-bit format
4th byte: Number of coils/register the operation targets
5th and 6th byte: Modbus CRC for the previous 4 bytes (see simplymodbus for details on how to compute this)
The second part of the packet is standard Modbus RTU, again see the simplymodbus website for details.
A packet + header to read registers 1000-1002 (the board identification packet) will look like this:
Header - [0x01,0x00,0x00,0x01,0x00,0x00,0x19,0x00,0x00,0x00] +
Packet p.1 – [0x04,0x0e,0xe8,0x03,0xa0,0xdd] +
Packet p.2 – [0x04,0x00,0xe8,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00, 0x00,0x12,0x16]
Further to this, you can intercept the SPI packets (sans the header) by setting the DETAILED_DEBUG hash-define at the top of the neuronspi.c file to 1.
--------------------------------------------------------------------------------------------------------------------------------
================================================================================================================================
--------------------------------------------------------------------------------------------------------------------------------
1st byte: Modbus code
- 0x01 - read single coil; 0x02 - read single bit (parsed together)
- 0x03 - read holding register(s); 0x04 - read input register(s) (parsed together)
- 0x05 - write single coil
- 0x06 - write single register; 0x10 - write multiple registers (parsed together)
- 0x0F - write multiple coils
- 0x41 - write UART character
- 0x64 - write UART data
- 0x65 - read UART data
2nd byte: Either data length of the payload/second phase (sans CRC) or the data to write for single phase ops
3rd byte: Lower bytes of the address (mask 0x00FF)
4th byte: Upper bytes of the address (mask 0xFF00)
5th byte: CRC[1] of bytes 1 to 4, with initial value of 0; lower bytes (mask 0x00FF)
6th byte: CRC[1] of bytes 1 to 4, with initial value of 0; upper bytes (mask 0xFF00)
7th byte: Same as the 1st byte
8th byte: Number of elements to read/write
9th byte: Same as the 3rd byte
10th byte: Same as the 4th byte
11th - (N+10)th: Data to read for write, 0x00 for read [N is the content length in bytes]
(N+11)th: CRC[2] of bytes 7 to (N+10), with initial value of CRC[1]; lower bytes (mask 0x00FF)
(N+12)th: CRC[2] of bytes 7 to (N+10), with initial value of CRC[1]; upper bytes (mask 0xFF00)
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#!/bin/sh
mkdir -p /run/
ln -s /sys/devices/platform/unipi_plc /run/unipi
exit 0
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obj-m += neuronspi.o
all:
make ARCH=arm CROSS_COMPILE=${CCPREFIX} -C /root/bokula/linux M=$(PWD) modules
clean:
make -C /root/bokula/linux M=$(PWD) clean
transfer: clean all
scp neuronspi.ko tomunipi:/root/
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cmd_/root/kernel/test_module/neuronspi.ko := /root/rpitools/tools/arm-bcm2708/arm-bcm2708-linux-gnueabi/bin/arm-bcm2708-linux-gnueabi-ld -EL -r -T ./scripts/module-common.lds --build-id -o /root/kernel/test_module/neuronspi.ko /root/kernel/test_module/neuronspi.o /root/kernel/test_module/neuronspi.mod.o ; true
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cmd_/root/kernel/test_module/test_module.ko := /root/rpitools/tools/arm-bcm2708/arm-bcm2708-linux-gnueabi/bin/arm-bcm2708-linux-gnueabi-ld -EL -r -T ./scripts/module-common.lds --build-id -o /root/kernel/test_module/test_module.ko /root/kernel/test_module/test_module.o /root/kernel/test_module/test_module.mod.o ; true
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/root/kernel/test_module/test_module.ko
/root/kernel/test_module/test_module.o
obj-m += test_module.o
all:
make ARCH=arm CROSS_COMPILE=${CCPREFIX} -C /root/bokula/linux M=$(PWD) modules
clean:
make -C /root/bokula/linux M=$(PWD) clean
kernel//root/kernel/test_module/test_module.ko
/*
* test_module.c
*
* Created on: 21 Jun 2017
* Author: Tom Knot <knot@faster.cz>
*/
#include <linux/init.h>
#include <linux/module.h>
MODULE_LICENSE("Dual BSD/GPL");
static int hello_init(void)
{
printk(KERN_ALERT "hello world \n");
printk(KERN_ALERT "module is up \n");
return 0;
}
static void hello_exit(void)
{
printk(KERN_ALERT "bye bye \n");
printk(KERN_ALERT "module is down \n");
return ;
}
module_init(hello_init);
module_exit(hello_exit);
#include <linux/module.h>
#include <linux/vermagic.h>
#include <linux/compiler.h>
MODULE_INFO(vermagic, VERMAGIC_STRING);
__visible struct module __this_module
__attribute__((section(".gnu.linkonce.this_module"))) = {
.name = KBUILD_MODNAME,
.init = init_module,
#ifdef CONFIG_MODULE_UNLOAD
.exit = cleanup_module,
#endif
.arch = MODULE_ARCH_INIT,
};
static const struct modversion_info ____versions[]
__used
__attribute__((section("__versions"))) = {
{ 0xbca7617b, __VMLINUX_SYMBOL_STR(module_layout) },
{ 0x2e5810c6, __VMLINUX_SYMBOL_STR(__aeabi_unwind_cpp_pr1) },
{ 0x27e1a049, __VMLINUX_SYMBOL_STR(printk) },
{ 0xb1ad28e0, __VMLINUX_SYMBOL_STR(__gnu_mcount_nc) },
};
static const char __module_depends[]
__used
__attribute__((section(".modinfo"))) =
"depends=";
MODULE_INFO(srcversion, "8CF11CEBBE96F8E41A95A22");
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